Altium

Design Rule Verification Report

Date: 5/6/2025
Time: 11:32:35 AM
Elapsed Time: 00:00:05
Filename: C:\Users\a0500111\Documents\Leo_Lea\EVM_files\BMC047D\TPS6593EVM files\6646672D\BMC047D.PcbDoc
Warnings: 0
Rule Violations: 0
Waived Violations: 8

Summary

Warnings Count
Total 0

Rule Violations Count
Clearance Constraint (Gap=5mil) (OnCopper and InPoly),(IsKeepOut) 0
Clearance Constraint (Gap=15mil) (OnCopper and Not InComponentClass('Logo') and not InComponentClass('FiducialMark') and not InRegion(1000,500,4000,800)),(IsKeepOut) 0
Clearance Constraint (Gap=5mil) (InPoly),(All) 0
Clearance Constraint (Gap=40mil) (OnCopper and InComponentClass('Mounting Holes')),(IsKeepOut) 0
Clearance Constraint (Gap=5mil) (IsVia),(IsVia) 0
Clearance Constraint (Gap=5mil) (IsPad),(IsPad) 0
Clearance Constraint (Gap=5mil) (All),(All) 0
Clearance Constraint (Gap=5mil) (IsKeepOut and InComponentClass('FiducialMark')),(IsPad and InComponentClass('FiducialMark')) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Modified Polygon (Allow modified: No), (Allow shelved: No) 0
Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (IsVia) 0
Power Plane Connect Rule(Direct Connect )(Expansion=10mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) 0
Minimum Annular Ring (Minimum=5mil) (All) 0
Minimum Annular Ring (Minimum=5mil) (IsVia and InAnyComponent) 0
Acute Angle Constraint [Tracks Only] (Minimum=45.000) (All) 0
Hole Size Constraint (Min=3.937mil) (Max=236.22mil) (All) 0
Hole To Hole Clearance (Gap=7.874mil) (All),(All) 0
Minimum Solder Mask Sliver (Gap=1.968mil) (All),(All) 0
Silk To Solder Mask (Clearance=0.984mil) (IsPad),(All) 0
Silk to Silk (Clearance=0.079mil) (All),(All) 0
Net Antennae (Tolerance=0mil) (All) 0
Component Clearance Constraint ( Horizontal Gap = 0mil, Vertical Gap = 0mil ) (All),(All) 0
Component Clearance Constraint ( Horizontal Gap = 2mil, Vertical Gap = 5mil ) (HasFootprint('0201*') or HasFootprint('0402*') or HasFootprint('0508') or HasFootprint('0603*') or HasFootprint('0612') or HasFootprint('0805*') or HasFootprint('0815*') or HasFootprint('0830*') or HasFootprint('1206*') or HasFootprint('1210*') or HasFootprint('1808*') or HasFootprint('1812*') or HasFootprint('1825*') or HasFootprint('2010*') or HasFootprint('2220*') or HasFootprint('2225*') or HasFootprint('2512*') or HasFootprint('2728*') or HasFootprint('3518*') or HasFootprint('IND_0805ES1')),(HasFootprint('0201*') or HasFootprint('0402*') or HasFootprint('0508') or HasFootprint('0603*') or HasFootprint('0612') or HasFootprint('0805*') or HasFootprint('0815*') or HasFootprint('0830*') or HasFootprint('1206*') or HasFootprint('1210*') or HasFootprint('1808*') or HasFootprint('1812*') or HasFootprint('1825*') or HasFootprint('2010*') or HasFootprint('2220*') or HasFootprint('2225*') or HasFootprint('2512*') or HasFootprint('2728*') or HasFootprint('3518*') or HasFootprint('IND_0805ES1')) 0
Component Clearance Constraint ( Horizontal Gap = 0mil, Vertical Gap = 0mil ) (IsThruComponent),(IsSMTComponent) 0
Component Clearance Constraint ( Horizontal Gap = 0mil, Vertical Gap = Infinite ) (IsThruComponent),(IsThruComponent) 0
Component Clearance Constraint ( Horizontal Gap = 100mil, Vertical Gap = 10mil ) (InComponentClass('Mounting Holes')),(Not InComponent('LBL1')) 0
Component Clearance Constraint ( Horizontal Gap = 5mil, Vertical Gap = 5mil ) (InComponent('J1*') or InComponent('J2*') or InComponent('J3*')),(HasFootprint('0402*')) 0
Component Clearance Constraint ( Horizontal Gap = 5mil, Vertical Gap = 10mil ) ((HasFootprint('NY PMS 440 0025 PH'))),((HasFootprint('Keystone_1902C'))) 0
Component Clearance Constraint ( Horizontal Gap = 5mil, Vertical Gap = 5mil ) (InComponent('Designator1') OR InComponent('Designator2')),(All) 0
Total 0

Waived Violations Count
Clearance Constraint (Gap=5mil) (All),(All) 1
Clearance Constraint (Gap=5mil) (IsKeepOut and InComponentClass('FiducialMark')),(IsPad and InComponentClass('FiducialMark')) 6
Short-Circuit Constraint (Allowed=No) (All),(All) 1
Total 8

Rule Violations

Waived Violations

Clearance Constraint (Gap=5mil) (All),(All)
Clearance Constraint: (Collision < 5mil) Between Pad U13-1(436.693mil,2591.685mil) on Bottom Layer And Region (0 hole(s)) Bottom Layer
Waived by Phil Yi at 6/8/2021 11:51:01 AM
It's not a real short. It's caused by the pin 1 indicator.
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Clearance Constraint (Gap=5mil) (IsKeepOut and InComponentClass('FiducialMark')),(IsPad and InComponentClass('FiducialMark'))
Clearance Constraint: (Collision < 5mil) Between Arc (4465mil,3244mil) on Top Layer And Pad FID5-1(4465mil,3244mil) on Top Layer
Waived by Phil Yi at 11/1/2019 3:16:13 PM
Ignore fiducial DRC marker.
Clearance Constraint: (Collision < 5mil) Between Arc (4468mil,3245mil) on Bottom Layer And Pad FID6-1(4468mil,3245mil) on Bottom Layer
Waived by Phil Yi at 11/1/2019 3:16:05 PM
Ignore fiducial DRC marker.
Clearance Constraint: (Collision < 5mil) Between Arc (450mil,170mil) on Bottom Layer And Pad FID4-1(450mil,170mil) on Bottom Layer
Waived by Phil Yi at 11/1/2019 3:16:09 PM
Ignore fiducial DRC marker.
Clearance Constraint: (Collision < 5mil) Between Arc (450mil,170mil) on Top Layer And Pad FID2-1(450mil,170mil) on Top Layer
Waived by Phil Yi at 11/1/2019 3:15:51 PM
Ignore fiducial DRC marker.
Clearance Constraint: (Collision < 5mil) Between Arc (480mil,3220mil) on Bottom Layer And Pad FID3-1(480mil,3220mil) on Bottom Layer
Waived by Phil Yi at 11/1/2019 3:16:17 PM
Ignore fiducial DRC marker.
Clearance Constraint: (Collision < 5mil) Between Arc (480mil,3220mil) on Top Layer And Pad FID1-1(480mil,3220mil) on Top Layer
Waived by Phil Yi at 11/1/2019 3:15:57 PM
Ignore fiducial DRC marker.
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Short-Circuit Constraint (Allowed=No) (All),(All)
Short-Circuit Constraint: Between Pad U13-1(436.693mil,2591.685mil) on Bottom Layer And Region (0 hole(s)) Bottom Layer Location : [X = 1115.898mil][Y = 4125.685mil]
Waived by Phil Yi at 6/8/2021 11:51:50 AM
It's not a real short. It's caused by the pin 1 indicator.
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